Digital/ASIC/Analog/RFIC design
SARATH RACHERLA
2516 Avent Ferry Rd, Apt 205, Raleigh. NC 27606
mailto:sarath.racherla@gmail.com Mobile: (337)254-6244
____________________________________________________________________________________
Objective:
Seeking an entry level full-time position in Digital,ASIC,Analog IC design in technically challenging environments.
Education:
M.S., Electrical Engineering
Dec 2007, GPA: 3.52/4.0
North Carolina State University,Raleigh,NC
B.S, Electronics and Communications Engineering
May 2005, CGPA: 82% with distinction
Chaithanya Bharathi Institute of Technology, Hyderabad, India
Skills:
Languages: Verilog, System Verilog, VHDL, Matlab, C, C#, VB, OOPS.
Tools: Cadence Tool Kit (Schematic composer, analog artist, spectre, hspice, analog environment, virtuoso, scope, awaves), Synopsys Tools (Design Analyzer, SimVision, PrimeTime),Xilinx, Matlab, LT Spice.Database: Pivotal, SQL Server 2000
Technologies: Cadence Tool Kit, Synopsys Tool Kit, Microsoft .NET Framework.
Interests: Digital/Analog/RF/ Mixed Signal IC design, High speed & Low power designs, Layouts, Place & Route, clock tree, FPGAs, Verification.
Google Maps Added
Now we have the Google Maps associated with every user. The map is updated with your present address zip codes. So if you thing you need to change that please change your location. (The link for that) is just below the map. http://www.cbitusa.org/?q=map/user
Blast from the Past
Added by Srini Nimmagadda (1985-89 ECE) snimmaga@ford.com
Footprints
|
"Yaadien, bas Yaadien reh jaati hain..Purani Jeans aur Guitar..".
I kept murmuring this song when I sat down to write these memories. (Foot Prints in time...endless...).
|
|
| Those events which just seemed like yesterday have today become memories. As I stand here watching the gates of the past shutting behind and goading me into the future, I look back at those events that have been a part of me till now and will remain forever. | |
